Flyback converters convert a first alternating current (AC) level or a first direct current (DC) level to a second DC current level. Flyback converters often have two or more circuits that are galvanically isolated from one another. Galvanic isolation means that current cannot flow directly between the circuits. However, energy can still be transferred between the different portions of the circuit through other means such as, for example, capacitance, induction, or electromagnetism.
Flyback converters commonly use transformers to galvanically isolate different circuits within the flyback converter. Transformers transfer energy through a coupling created by the magnetic flux between a first and a second winding of the transformer. Depending on the winding ratio of the transformer, a first voltage may be increased, decreased, or in some applications remain the same.
The transformer effectively splits the flyback converter into two circuits, a primary circuit and a secondary circuit. When the primary side circuit is ON, current flows through the windings of the transformer in the primary circuit. The flow of current through the windings creates a magnetic flux that induces a voltage with a first polarity across the transformer windings of the secondary circuit. Energy is stored in the magnetic flux between the transformer windings of the primary circuit and the transformer windings of the secondary circuit. The secondary circuit will have a polar circuit mechanism, such as a diode, that will prevent energy from flowing as electric current through the secondary circuit transformer windings when the voltage across the polar mechanism is reversed biased. When the primary circuit is OFF the polarity of the voltage across the secondary winding is reversed and the energy stored in the magnetic flux between the primary circuit transformer windings and the secondary circuit transformer windings will flow into the secondary circuit as electric current. However, not all of the energy stored in the magnetic flux is transferred to the secondary circuit. Some energy is stored in the primary circuit by a magnetizing inductance of the primary circuit, and some energy is stored in the primary circuit as the result of a leakage inductance of the primary circuit. These inductances create electric currents in the primary circuit even when the primary circuit is OFF.
The ON and OFF states of the primary circuit can be controlled by a control switch disposed between an input of the primary circuit and its ground. The input of the converter is connected to a first terminal of the transformer, and the control switch is connected to the other terminal. By controlling the connection to ground using the switch, current flowing through the primary circuit transformer windings from the input is controlled. The switching voltage at the node that connects the transformer to the control switch will alternate between a high-voltage level and a value close to 0V, when the control switch changes the state.
When the connection of the clamping circuit between the switching node and ground or between the switching node and input source is controlled by a clamping switch in series with the clamping capacitor, the clamp circuit is considered active. The active clamp circuit can eliminate both switching loss and clamping loss of the flyback converter. The flow of current at various switching states is described in detail in R. Watson, F. C. Lee, G. C. Hua, “Utilization of an active-clamp circuit to achieve soft switching in flyback converter,” IEEE Trans., 1994 which is hereby incorporated by reference in its entirety.
When the primary circuit is turned off, the energy stored in the primary circuit as a result of the magnetizing and leakage inductance will commute to a clamp circuit. The clamp circuit may connect between the node that connects the transformer to the control switch and ground, or between the switch node and the input source.
When the clamping circuit is formed by a diode rectifier in series with a transient voltage suppressor (TVS), two power losses impair the efficiency of the power convertor, especially when the control switch is operated at high switching frequency. These power losses are switching loss and clamping loss. Switching loss is governed by equation (1) below.
      P    Csw    =            1      2        ⁢                            C          sw                ⁡                  (                                    V              in                        -                          NV              0                                )                    2        ⁢          f      sw      Equation (1) explains that the power dissipated by the control switch, PCsw, is equal to half of the square of the difference between the input voltage, Vin, and the product of the winding ratio, N, and the output voltage, V0, multiplied by the resonate switch node capacitance, Csw, and the switching frequency, fsw. Clamping loss is governed by equation (2) below.
      P    clamp    =                    V        clamp                              V          clamp                -                  NV          0                      ⁢          1      2        ⁢          L      k        ⁢          i              m        ⁡                  (          +          )                    2        ⁢          f      sw      Equation (2) explains that the power dissipated by the clamp circuit, Pclamp, is equal to half of the ratio of the clamp voltage on the TVS, Vclamp, to the difference between the clamp voltage and the product of the winding ratio, N, and the output voltage, V0, multiplied by the product of the leakage inductance, Lk, the switching frequency, fsw, and the square of the positive peak magnetizing current, im(+).
As can be seen from observing equations (1) and (2) above, the clamping loss, Pclamp, and the switching loss, PCsw, are directly proportional to the switching frequency, fsw. As such, clamping and switching losses are bottlenecks from high frequency operation of the flyback converters using this conventional clamping circuit.
The power losses explained in equations (1) and (2) above can be minimized by controlling the ON and OFF state of the control switch and the clamp switch in accordance with zero voltage switching (ZVS) conditions. ZVS can be achieved when the inequality in equation (3) below is true.
            1      2        ⁢          L      m        ⁢          i              m        ⁡                  (          -          )                    2        ≥            1      2        ⁢          C      sw        ⁢          V      sw      2      Equation (3) explains that zero voltage switching can be achieved when half of the product of the magnetizing inductance, Lm, and the square of the negative peak magnetizing current, im(−), is greater than or equal to half of the product of the resonant switching node capacitance, Csw, and the square of the switching node voltage, Vsw.
In order to control the ON and OFF states of the control and clamp switches such that ZVS conditions are met, the length of the dead time between turning the control switch OFF and the clamp switch ON, TD(L-H); the length of the time the clamp switch is ON, TDM; and the length of dead time between turning the clamp switch OFF and the control switch ON, TD(H-L), must be properly controlled.
The goal of controlling TD(L-H) is to properly control the ZVS timing of the clamping switch. Optimally, TD(L-H) may be controlled by equation (4) below.
      T          D      ⁡              (                  L          -          H                )              =                    C        sw                    i                  m          ⁡                      (            +            )                                ⁢          (                        V          in                +                  NV          0                    )      Equation (4) explains that TD(L-H) is directly proportional to the switching node capacitance, Csw, multiplied by the sum of the input voltage, Vin, and the product of the winding ratio, N, and the output voltage, V0. Equation (4) further explains that TD(L-H) is inversely proportional to the positive peak current, im(+).
The switching node capacitance, Csw, represents the total capacitive load of the switching node on the primary circuit, which includes the nonlinear junction capacitance of control switch and clamping switch. Variation of the switching node capacitance, Csw, is affected by the capacitance nonlinearity and the manufacturing tolerance. The input voltage, Vin, range varies widely due to the universal AC line's ranging from 90 Vac to 265 Vac. The voltage output, V0, range also varies widely from 5V to 20V to power personal electronic devices, and im(+) is modulated for the output voltage, V0, regulation of the wide output load range. Because Equation (4) is sensitive to those parameter changes and operating conditions, controller design based on Equation (4) is difficult.
For example, Csw, has non-linear components. Taking these non-linearities into account, the optimal TD(L-H) is approximated by Equation (5) below.
      T          D      ⁡              (                  L          -          H                )              ≈                              2          ⁢                      C            oss_Small                                    i                      m            ⁡                          (              +              )                                          ⁢              (                              V            in                    +                      NV            0                    -                      V            th                          )              +                            2          ⁢                      C            oss_Big                                    i                      m            ⁡                          (              +              )                                          ⁢              V        th            Equation (5) accounts for the non-linear nature of Csw by approximating TD(L-H) using its components, Coss_Small and Coss_Big. Vth is the drain-to-source voltage of the control switch where the junction capacitance transitions from a large capacitance value to a small capacitance value.
If the clamping switch is turned ON before the optimal time period for TD(L-H) expires, ZVS is lost for the clamping switch. This will result in a hard-switching event. Hard-switching causes large power loss and creates a large amount of electromagnetic interference.
For any duration of time that the clamping switch remains OFF after the optimal time period for TD(L-H) expires, power losses across the body diode of the clamping switch will occur, since the body diode conduction time is extended.
The goal of controlling TDM is to properly control the ON time of the control switch. TDM can be optimally calculated using equation (6) below.
            T      DM        =                                        L            m                    ⁢                      i                          m              ⁡                              (                +                )                                                              NV          0                    +                        tan          ⁡                      (                          θ              2                        )                          ⁢                                            L              m                        ⁢                          C              sw                                                      where      ⁢                          ⁢              T        LC              =                  2        ⁢        π        ⁢                                            L              m                        ⁢                          C              sw                                      ⁢                                  ⁢        and        ⁢                                  ⁢                  θ          2                    =                        cos                      -            1                          ⁢                              NV            0                                V            in                              
Equation (6) explains that the optimal value of TDM is equal to the ratio of the product of the magnetizing inductance, Lm, and the positive peak magnetizing current, im(+), to the product of the winding ratio, N, and the output voltage, V0, added to the product of tan (θ2) and the square root of the product of the magnetizing current, Lm, and the resonant switching node capacitance, Csw.
If TDM is not long enough, the negative peak magnetizing current will not be large enough, causing the switching node voltage, Vsw, to be greater than zero when TD(H-L) expires. This will result in loss of ZVS of the control switch, causing switching losses to increase.
If TDM is too long, the negative peak magnetizing current will become too large. This results in a larger conduction loss because the root mean square (RMS) of the magnetizing current is larger, causing more current flow into the clamping and control switches as well as the transformer. This also results in a larger power loss on the magnetic core of the transformer because higher peak-to-peak magnetizing current increases the flux density.
The goal of controlling TD(H-L) is to properly control the ZVS timing of the control switch. TD(H-L) can be optimally controlled by equation (7) below.
            T                        D          ⁡                      (                          H              -              L                        )                          ⁢        OPT              =                            (                      π            -                          θ              2                                )                          2          ⁢          π                    ⁢              T        LC                        Where      ⁢                          ⁢              T        LC              =                  2        ⁢        π        ⁢                                            L              m                        ⁢                          C              sw                                      ⁢                                  ⁢        and        ⁢                                  ⁢                  θ          2                    =                        cos                      -            1                          ⁢                              NV            0                                V            in                              
Equation (7) explains that the optimal value of TD(H-L)OPT is equal to the product of the capacitive-inductive time constant, TLC, and the quotient of
            (              π        -                  θ          2                    )              2      ⁢      π        .
If TD(H-L) is too long, the switching node voltage, Vsw, will resonate above 0V again after the voltage reaches 0V and cause the control switch to be turned ON when the switching node voltage, Vsw, is a non-zero value. This results in a loss of ZVS for the control switch and causes power losses.
If TD(H-L) is too short, the negative peak magnetizing current has to be increased to achieve ZVS of control switch within the limited time. This results in a large conduction loss because the root mean square (RMS) of the magnetizing current is larger, causing more current to flow into the clamping and control switches as well as the transformer. Besides, this also results in a large power loss on the magnetic core of the transformer because higher peak-to-peak magnetizing current increases the flux density.
A first prior art solution addresses the power losses associated with TD(L-H), TDM, and TD(H-L), discussed above, by fixing TD(L-H) and TD(H-L) to a set length of time and creating a duty cycle dependent TDM using a fixed switching frequency. In this solution, the two fixed dead time settings cannot provide optimal design over the parameter variations, so the related power loss issues cannot be resolved. The duty cycle of the pulse width modulated signal controlling TDM is operated at a constant frequency condition through the input and load range. However, because the frequency of the PWM signal is fixed, the power losses when utilizing this prior art solution are still substantial. For example, the fixed frequency operation keeps TDM the same between heavier and lighter output load conditions, so the fixed TDM will unnecessarily increase the negative peak magnetizing current, im(−), at a lighter load. This will result in too much circulating energy in the circuit for ZVS, so light load efficiency is impaired. Similarly, if the frequency remains the same for high and low input voltage, Vin, conditions, the negative peak magnetizing current will be too low for low line, resulting in hard switching of the control switch.
A second prior art solution attempts to use complex mathematical equations that use predicted values of the magnetizing inductance, Lm, and the resonant switching node capacitance, Csw, to individually solve for TD(L-H), TDM, and TD(H-L). However, the use of these equations increases the cost of the microcontroller unit (MCU) needed to solve for these values. Most importantly, the values generated are sensitive to component tolerance because they are based on the magnetizing inductance, Lm, and the resonant switching node capacitance, Csw. When the actual value is deviated away from the predetermined value in MCU, the calculated result will be offset from the optimal timing, and causes the power loss increase.
Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions and/or relative positioning of some of the elements in the figures may be exaggerated relative to other elements to help improve understanding of various embodiments of the disclosure. Also, common but well-understood elements that are useful or necessary in a commercially feasible embodiment are often not depicted to facilitate a less obstructed view of these various embodiments. It will further be appreciated that certain actions and/or steps may be described or depicted in a particular order of occurrence while those skilled in the art will understand that such specificity with respect to sequence is not actually required. It will also be understood that the terms and expressions used herein have the ordinary technical meaning as is accorded to such terms and expressions by persons skilled in the technical field as set forth above, except where different specific meanings have otherwise been set forth herein.